A two Day workshop was conducted on ‘Power of FPGA and Asic Design using Mentor Graphics Tool’ by Pavanveneker on 1st and 2nd February-2017 in association with Trident Teclabs. In view to provide a better exposure for the faculty and students in the Design and Verification of Digital Circuits using front-end and back-end tools the course of the Workshop has been designed. VLSI design flow is the major key factor for the present emerging systems and technology and the workshop is dedicated to train the faculty and students on VLSI design. This training has given an invaluable resource for the participants, those who are trying to enhance their knowledge in the current needs of the VLSI Industry.
𝐆𝐮𝐞𝐬𝐭 𝐋𝐞𝐜𝐭𝐮𝐫𝐞 𝐨𝐧 𝐂𝐚𝐦𝐩𝐮𝐬 𝐭𝐨 𝐂𝐨𝐫𝐩𝐨𝐫𝐚𝐭𝐞 𝐂𝐨𝐧𝐧𝐞𝐜𝐭: 𝐒𝐨𝐟𝐭 𝐒𝐤𝐢𝐥𝐥𝐬
𝐌𝐫. 𝐒𝐚𝐭𝐢𝐬𝐡 𝐑𝐞𝐝𝐝𝐲 𝐄𝐚𝐝𝐚𝐥𝐚, 𝐚 𝐒𝐞𝐧𝐢𝐨𝐫 𝐏𝐫𝐨𝐣𝐞𝐜𝐭 𝐌𝐚𝐧𝐚𝐠𝐞𝐫 𝐚𝐭 𝐈𝐕𝐘, shared invaluable insights on enhancing soft skills for a smooth transition from campus life to the corporate world. Our students gained a wealth of knowledge on the importance of communication, teamwork,...
0 Comments