A two Day workshop was conducted on ‘Power of FPGA and Asic Design using Mentor Graphics Tool’ by Pavanveneker on 1^st and 2^nd February-2017 in association with Trident Teclabs. In view to provide a better exposure for the faculty and students in the Design and Verification of Digital Circuits using front-end and back-end tools the course of the Workshop has been designed. VLSI design flow is the major key factor for the present emerging systems and technology and the workshop is dedicated to train the faculty and students on VLSI design. This training has given an invaluable resource for the participants, those who are trying to enhance their knowledge in the current needs of the VLSI Industry.